Transformer Model

Contents:

• 1 Transformer Equivalent Circuit
• 2 Transformer Parameters
  • 2.1 Leakage Impedance
  • 2.2 Voltage Transformation
    • 2.2.1 Transformation Ratio
    • 2.2.2 Phase Shift
  • 2.3 Voltage Regulation
• 3 Transformer Admittance Model
• 4 Computing Admittances
  • 4.1 Self Admittances
    • 4.1.1 Primary Admittance
    • 4.1.2 Secondary Admittance
  • 4.2 Transfer Admittances
    • 4.2.1 Primary to Secondary
    • 4.2.2 Secondary to Primary
    • 4.2.3 Observations on Computational Sequence
• 5 TCUL Devices
  • 5.1 Computing Tap Adjustments
  • 5.2 Error Feedback Formulation
  • 5.3 Controlled Bus Sensitivity
  • 5.4 Physical Constraints on Tap Settings
• 6 Transformers in the Nodal Admittance Matrix
• 7 The Nodal Admittance Matrix during TCUL
• 8 Integrating TCUL into FDLF
• References

List of Tables:

• 1 Per Unit to Ohm Conversion Constants
• 2 Transformer Phase Shifts
• 3 Common Transformer Tap Parameters
• 4 Y_bus Maintenance Costs

List of Figures:

• 1 Transformer Equivalent Circuit Diagram